Shielding heterogeneous MPSoCs from untrustworthy 3PIPs through security-driven task scheduling

• Published in: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS) pp. 101 - 106
• Main Authors: Chen Liu, Rajendran, Jeyavijayan, Chengmo Yang, Karri, Ramesh
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.10.2013
• Subjects: Complexity theory; Discrete Fourier transforms; Fault tolerance; Fault tolerant systems; Hardware Trojan; Heterogeneous MPSoCs; Multi-dimension Optimization; Security; Size measurement; Task Scheduling; Trojan horses
• ISSN: 1550-5774; 2377-7966
• DOI: 10.1109/DFT.2013.6653590

Outsourcing of the various aspects of IC design and fabrication flow strongly questions the classic assumption that "hardware is trustworthy". Multiprocessor System-on-Chip (MPSoC) platforms face some of the most demanding security concerns, as they process, store, and communicate sensitive information using third-party intellectual property (3PIP) cores that may be untrustworthy. The complexity of an MPSoC makes it expensive and time consuming to fully analyze and test it during the design stage. Consequently, the trustworthiness of the 3PIP components cannot be ensured. To protect MPSoCs against malicious modifications, we propose to incorporate trojan toleration into MPSoC platforms by revising the task scheduling step of the MPSoC design process. We impose a set of security-driven diversity constraints into the scheduling process, enabling the system to detect the presence of malicious modifications or to mute their effects during application execution. Furthermore, we pose the security-constrained MPSoC task scheduling as a multi-dimensional optimization problem, and propose a set of heuristics to ensure that the introduced security constraints can be fulfilled with minimum performance and hardware overhead.