Low noise CMOS mixers
This paper presents two new mixer circuits, designed by implementing the noise cancellation technique (NCT) (Bruccoleri et al., 2001) for a CMOS transistor (MOST) on single balanced mixer architecture. The single side band (SSB) noise figure performance of the proposed down conversion mixer architec...
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Published in | International Symposium on Signals, Circuits and Systems, 2005. ISSCS 2005 Vol. 2; pp. 685 - 688 Vol. 2 |
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Main Authors | , , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
2005
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Subjects | |
Online Access | Get full text |
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Summary: | This paper presents two new mixer circuits, designed by implementing the noise cancellation technique (NCT) (Bruccoleri et al., 2001) for a CMOS transistor (MOST) on single balanced mixer architecture. The single side band (SSB) noise figure performance of the proposed down conversion mixer architectures can be as low as 3.6dB@280MHz IF, if coils are used. The conversion gain of such NCT mixer is higher than 7dB, the IP3 is -5dBm and its power consumption is smaller than 13mW at 1.8V voltage supply. |
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ISBN: | 9780780390294 0780390296 |
DOI: | 10.1109/ISSCS.2005.1511333 |