Gradualist and Case Experimental Design for Digital Clock Based on Pocket Laboratory

In order to the reform of digital circuit experiment course, this paper introduces gradualist and case experimental teaching mode based on the FPGA pocket laboratory platform with the teaching resourc and an students' characteristics. The course selects a complete practical project, the digital...

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Bibliographic Details
Published in2018 IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia) pp. 27 - 31
Main Author Wang, Shuqun
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.10.2018
Subjects
adualist
Clocks
digital circuit experiment
Digital circuits
digital clock
Education
Field programmable gate arrays
Hardware design languages
IP networks
pocket laboratory
Technological innovation
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Summary:In order to the reform of digital circuit experiment course, this paper introduces gradualist and case experimental teaching mode based on the FPGA pocket laboratory platform with the teaching resourc and an students' characteristics. The course selects a complete practical project, the digital clock design as a classic case,which is divided into basic, comprehensive, design-type, expanding innovation four levels from shallow to deep.The project can easy split into nine small experiments,which takes the experiment as gradualist teaching mode.Through the training of this model,the students can gradually finish the tasks of these experiments step by step with rapid interesting and promoted ability.All the experiments has achieved good results,most of which are valuable.
ISSN:2159-2160
DOI:10.1109/PRIMEASIA.2018.8597692