Within-die gate delay variability measurement using re-configurable ring oscillator

We report a circuit technique to measure the on-chip delay of an individual logic gate (both inverting and non-inverting) in its unmodified form using digitally reconfigurable ring oscillator (RO). Solving a system of linear equations with different configuration setting of the RO gives delay of an...

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Bibliographic Details
Published in2008 IEEE Custom Integrated Circuits Conference pp. 133 - 136
Main Authors Das, B.P., Amrutur, B., Jamadagni, H.S., Arvind, N.V., Visvanathan, V.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.09.2008
Subjects
Circuit testing
Inverters
Length measurement
Measurement standards
Propagation delay
Ring oscillators
Semiconductor device measurement
Thickness measurement
Timing
Tracking loops
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Summary:We report a circuit technique to measure the on-chip delay of an individual logic gate (both inverting and non-inverting) in its unmodified form using digitally reconfigurable ring oscillator (RO). Solving a system of linear equations with different configuration setting of the RO gives delay of an individual gate. Experimental results from a test chip in 65 nm process node show the feasibility of measuring the delay of an individual inverter to within 1 pS accuracy. Delay measurements of different nominally identical inverters in close physical proximity show variations of up to 26% indicating the large impact of local or within-die variations.
ISBN:9781424420186
1424420180
ISSN:0886-5930
2152-3630
DOI:10.1109/CICC.2008.4672039