A comparative study between Fractional-N PLL and Flying-Adder PLL

Frequency synthesis is one of the most important and most actively researched subjects in the field of VLSI mixed-signal circuit design. Among the existing techniques in this area, Fractional-N architecture is a widely used one for generating frequencies which are not integer multiple of the input r...

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Bibliographic Details
Published in2010 IEEE International Symposium on Circuits and Systems (ISCAS) pp. 237 - 240
Main Authors Liming Xiu, Chen-Wei Huang, Ping Gui
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.05.2010
Subjects
Circuit synthesis
Clocks
Delta-sigma modulation
Frequency conversion
Frequency synthesizers
Microelectronics
Phase locked loops
Signal generators
Technological innovation
Voltage-controlled oscillators
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Summary:Frequency synthesis is one of the most important and most actively researched subjects in the field of VLSI mixed-signal circuit design. Among the existing techniques in this area, Fractional-N architecture is a widely used one for generating frequencies which are not integer multiple of the input reference frequency. Flying-Adder architecture is an emerging technique which is based on a new concept, Time-Average-Frequency, to generate frequencies. This paper presents an in-depth analysis and comparison between the two methods.
ISBN:1424453089
9781424453085
ISSN:0271-4302
DOI:10.1109/ISCAS.2010.5537927