Performance Bound Analysis and Retiming of Timed Circuits
Timed asynchronous circuits are efficient in performance and power consumption. Traditional performance analysis method can not analyze timed circuits efficiently. In this paper, we model timed circuits using timed Petri net and digraph. We studied the mean cycle time of timed Petri net model. The u...
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Published in | 2008 The 9th International Conference for Young Computer Scientists pp. 212 - 217 |
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Main Authors | , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
01.11.2008
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Subjects | |
Online Access | Get full text |
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