Methods for modeling resource contention on simultaneous multithreading processors

• Published in: 2005 International Conference on Computer Design pp. 373 - 380
• Main Authors: Moseley, T., Kihm, J.L., Connors, D.A., Grunwald, D.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 2005
• Subjects: Bandwidth; Counting circuits; Hardware; Linear regression; Multithreading; Operating systems; Processor scheduling; Surface-mount technology; Throughput; Yarn
• ISBN: 0769524516; 9780769524511
• ISSN: 1063-6404; 2576-6996
• DOI: 10.1109/ICCD.2005.74

Simultaneous multithreading (SMT) seeks to improve the computation throughput of a processor core by sharing primary resources such as functional units, issue bandwidth, and caches. SMT designs increase utilization and generally improve overall throughput, but the amount of improvement is highly dependent on competition for shared resources between the scheduled threads. This variability has implications that relate to operating system scheduling, simulation techniques, and fairness. Although these techniques recognize the implications of thread interaction, they do little to profile and predict this interaction. The modeling approach presented in this paper uses data collected from performance counters on two different hardware implementations of Pentium-4 hyper-threading processors to demonstrate the effects of thread interaction. Techniques are described for fitting linear regression models and recursive partitioning to use the counters to make online predictions of performance (expressed as instructions per cycle); these predictions can be used by the operating system to guide scheduling decisions. A detailed analysis of the effectiveness of each of these techniques is presented.