Misalignment of the Block Oxide Height in Self-Aligned bSPIFET

• Published in: 2007 IEEE International Conference on Integrated Circuit Design and Technology pp. 1 - 4
• Main Authors: Jyi-Tsong Lin, Yi-Chuen Eng
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.05.2007
• Subjects: Chemical vapor deposition; Dielectrics and electrical insulation; Dry etching; Electric variables; FETs; Fluctuations; Leakage current; MOSFETs; Semiconductor films; Ultra large scale integration
• ISBN: 9781424407569; 1424407567
• ISSN: 2381-3555; 2691-0462
• DOI: 10.1109/ICICDT.2007.4299555

For the purpose of performance improvement from bSPIFET (Si on partial insulator with block oxide field-effect transistor) technology [1], a self-aligned bSPIFET was proposed. However, a lot of electrical characteristics have not yet been studied in detail. This paper aims to investigate the device behaviour of self-aligned bSPIFET as a function of misaligned block oxide height. According to the TCAD simulation, the misalignment of the block oxide height makes the fluctuation in electrical characteristics (e.g., drain-induced barrier lowering DIBL, subthreshold swing, leakage current), hence the etch rate of oxide for the block spacer formation becomes one of the key parameters for self-aligned bSPIFET process. This is due to the block oxide height enclosing the Si-body, which decides the blocked regions between body and source/drain (S/D). In brief, the main function of the block oxide is to diminish the charge sharing for improving the device performance.