Linear CMOS power amplifier at Ka-band with ultra-wide video bandwidth
A highly linear power amplifier (PA) with ultra-wide video bandwidth is designed at a Ka-band for 5G application. To get a high linearity with high efficiency, a deep class-AB topology with 2 nd harmonic control circuits is employed, reducing the 3 rd order nonlinearity. Further, an efficient low-dr...
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Published in | 2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) pp. 220 - 223 |
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Main Authors | , , , , , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
01.06.2017
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Subjects | |
Online Access | Get full text |
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Summary: | A highly linear power amplifier (PA) with ultra-wide video bandwidth is designed at a Ka-band for 5G application. To get a high linearity with high efficiency, a deep class-AB topology with 2 nd harmonic control circuits is employed, reducing the 3 rd order nonlinearity. Further, an efficient low-drop out (LDO) regulator is proposed to suppress the memory effect generated by the envelope and fundamental nonlinear mixing. The PA, composed of 3 cascaded common-source (CS) stages, achieves peak PAE of 21.8% at output power of 14 dBm with 22 dB gain. The 3 rd order inter-modulation distortion (IMD3) at an output power of 5 dBm is under -30 dBc for a video bandwidth of 1 GHz. The PA and LDO are fabricated in a 65 nm CMOS process and occupy 0.53 mm 2 . |
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ISSN: | 2375-0995 |
DOI: | 10.1109/RFIC.2017.7969057 |