Modeling the 3D self ballasting behavior and filamentation under high current stressing in DeNMOS

A critical understanding of self ballasting behavior due to current crowding of avalanche generated carriers in a DeNMOS is developed. Then we study its performance under the gate biased conditions. The impact of flow of holes and electron in the bulk and across the surface - on the snapback-back fe...

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Published in2011 IEEE 23rd International Symposium on Power Semiconductor Devices and ICs pp. 164 - 167
Main Authors Chatterjee, A., Pendharkar, S., Duvvury, C., Brewer, F.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.05.2011
Subjects
Charge carrier processes
Electronic ballasts
Electrostatic discharge
Logic gates
Proximity effect
Surface treatment
Three dimensional displays
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Summary:A critical understanding of self ballasting behavior due to current crowding of avalanche generated carriers in a DeNMOS is developed. Then we study its performance under the gate biased conditions. The impact of flow of holes and electron in the bulk and across the surface - on the snapback-back features has been critically evaluated through variations in the device structure (associated with process parameter) which has also been extensively studied through 2D & 3D TCAD simulations. We demonstrate that after an initial homogeneous triggering (due to bipolar snapback), self heating preferentially activates the 2D array of bipolars in the bulk and subsequently current instability under negative resistance regime (as the bipolar turns on) leads to inhomogeneous triggering in the 3D.
ISBN:9781424484256
1424484251
ISSN:1063-6854
1946-0201
DOI:10.1109/ISPSD.2011.5890816