Challenges for sub-10 nm CMOS devices

Scaling issues of nano-size MOSFETs will be discussed on the basis of sub-10 nm MOSFETs characteristics, which have been developed and confirmed switching characteristics. Understanding device limitations and developing new breakthrough technologies should be required to challenge sub-10-nm CMOS dev...

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Bibliographic Details
Published in2006 International Workshop on Nano CMOS pp. 125 - 127
Main Authors Mogami, T., Wakabayashi, H.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.01.2006
Subjects
CMOS technology
Kelvin
Microelectronics
MOSFETs
Nanoscale devices
National electric code
Silicon
Temperature dependence
Tunneling
Voltage
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Summary:Scaling issues of nano-size MOSFETs will be discussed on the basis of sub-10 nm MOSFETs characteristics, which have been developed and confirmed switching characteristics. Understanding device limitations and developing new breakthrough technologies should be required to challenge sub-10-nm CMOS devices.
ISBN:142440603X
9781424406036
DOI:10.1109/IWNC.2006.4570982