Challenges for sub-10 nm CMOS devices
Scaling issues of nano-size MOSFETs will be discussed on the basis of sub-10 nm MOSFETs characteristics, which have been developed and confirmed switching characteristics. Understanding device limitations and developing new breakthrough technologies should be required to challenge sub-10-nm CMOS dev...
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Published in | 2006 International Workshop on Nano CMOS pp. 125 - 127 |
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Main Authors | , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
01.01.2006
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Subjects | |
Online Access | Get full text |
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Summary: | Scaling issues of nano-size MOSFETs will be discussed on the basis of sub-10 nm MOSFETs characteristics, which have been developed and confirmed switching characteristics. Understanding device limitations and developing new breakthrough technologies should be required to challenge sub-10-nm CMOS devices. |
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ISBN: | 142440603X 9781424406036 |
DOI: | 10.1109/IWNC.2006.4570982 |