A 0.9V 3rd-order single-OPAMP analog filter in 28nm CMOS-bulk

A 3 rd οrder 132MHz cut-off frequency low-pass filter in 2Snm CMOS-bulk technology is presented. Challenges related to the design of analog circuits in 28nm CMOS-bulk process node have been faced and mitigated operating at both architecture and circuit design level. The filter is based on an improve...

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Bibliographic Details
Published in2017 7th IEEE International Workshop on Advances in Sensors and Interfaces (IWASI) pp. 155 - 158
Main Authors De Matteis, Marcello, Donno, Andrea, Marinaci, Stefano, D'Amico, Stefano, Baschirotto, Andrea
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.06.2017
Subjects
analog filter
Capacitance
Cutoff frequency
Impedance
Logic gates
low-voltage circuits
nanometer CMOS
Power harmonic filters
Transfer functions
Transistors
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Summary:A 3 rd οrder 132MHz cut-off frequency low-pass filter in 2Snm CMOS-bulk technology is presented. Challenges related to the design of analog circuits in 28nm CMOS-bulk process node have been faced and mitigated operating at both architecture and circuit design level. The filter is based on an improved Active-g m -RC structure, where both poles of a Miller-compensated Opamp have been used for synthesizing the 3 rd order filter transfer function. The proposed circuit solution enables high linearity (11P3=11.5dBm at 21&22MHz input tones) even if the supply voltage is limited to 0.9V. Moreover, the power consumption is kept as low as 340μW without that the Signal-toNoise ratio (60dB) is penalized. The achieved Figure-of-Merit is 164dB resulting the highest with respect to the state-of-the-art.
DOI:10.1109/IWASI.2017.7974237