Challenges in 3DIC implementation of a design using current CAD tools

• Published in: 2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS) pp. 478 - 481
• Main Authors: Neela, G., Draper, J.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.08.2012
• Subjects: Bonding; Clocks; Delay; Design automation; Stacking

3D chip stacking technology has been gaining traction in recent years, as academia and industry are showing greater interest in going vertical. However, most research so far has been limited to theoretical analysis due to lack of industry-standard CAD tools to design 3D chips. In this paper, a 3DIC...