The architecture of OCMP and its evaluation

• Published in: Proceedings of the 1997 International Symposium on Parallel Architectures, Algorithms and Networks (I-SPAN'97) pp. 71 - 77
• Main Authors: Saisho, K., Sano, T., Fukuda, A.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 1997
• Subjects: Costs; Delay; Dispatching; Erbium; Memory management; Multiprocessing systems; Parallel processing; Processor scheduling; Registers

By gathering multiple processors in one LSI chip, communication delay between processors becomes shorter and then efficient fine/medium grain parallel processing can be realized. The authors propose a new processor architecture called OCMP (On-Chip Multi-Processing Architecture). OCMP has two charac...