Synthesis of dynamic class loading specifications on reconfigurable hardware

• Published in: Proceedings. DELTA 2004. Second IEEE International Workshop on Electronic Design, Test and Applications pp. 431 - 433
• Main Authors: Agosta, G., Bruschi, F., Sciuto, D.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 2004
• Subjects: Automotive engineering; Digital systems; Embedded system; Field programmable gate arrays; Hardware; Image processing; Logic devices; Object oriented modeling; Signal processing; Vehicle dynamics
• ISBN: 9780769520810; 0769520812
• DOI: 10.1109/DELTA.2004.10069

In the field of embedded systems design and specification, an emerging need is to be able to exploit the dynamical reconfigurability of electronic devices such as the FPGAs. These devices potentially offer the ability to extend or modify the functionality of a system during operation. The set of applications that would benefit from such a possibility is wide and includes signal and image processing, network devices, automotive systems. One of the main problems in exploiting such a possibility is the lack of a formalism that lets the designer model the reconfigurable behavior in high-level system representations and then to implement it on logic devices. Our work aims at investigating the potentiality of object oriented language features in the development of digital systems with dynamically reconfigurable components. In particular, we explore the implementation feasibility of the implementation of a set of reconfigurable functions of the system, starting from a high level representation based on the Java dynamic class loading semantics.