AWESpice: a general tool for the accurate and efficient simulation of interconnect problems

• Published in: [1992] Proceedings 29th ACM/IEEE Design Automation Conference pp. 87 - 92
• Main Authors: Raghavan, V., Bracken, J.E., Rohrer, R.A.
• Format: Conference Proceeding
• Language: English
• Published: IEEE Comput. Soc. Press 1992
• Subjects: Circuit simulation; Circuit topology; Computational modeling; Coupling circuits; Delay systems; Distributed parameter circuits; Integrated circuit interconnections; Integrated circuit packaging; Printed circuits; Propagation losses
• ISBN: 9780818628221; 0818628227
• ISSN: 0738-100X
• DOI: 10.1109/DAC.1992.227856

AWESpice is a tool for the efficient and accurate simulation of circuits dominated by interconnect. It accepts a general nonlinear circuit and uses the asymptotic waveform evaluation (AWE) algorithm to efficiently convert its linear interconnect portion into multiport admittance macromodels. The macromodels are then simulated in conjunction with the nonlinear devices using a modified version of the SPICE algorithm. This technique leads to a significant reduction in CPU time while retaining the benefits of a conventional circuit simulator. Some examples that have been run to show the accuracy and efficiency of AWESpice on a variety of interconnect problems are presented.< >