Partitioning by regularity extraction

The authors present a general methodology for extracting regularity at any level of hierarchy, and explore the problem of digital system partitioning by extraction of regularity. They consider system-level partitioning to demonstrate that regularity can lead to reduced design costs. The digital syst...

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Bibliographic Details
Published in[1992] Proceedings 29th ACM/IEEE Design Automation Conference pp. 235 - 238
Main Authors Rao, D.S., Kurdahi, F.J.
Format Conference Proceeding
LanguageEnglish
Published IEEE Comput. Soc. Press 1992
Subjects
Circuit testing
Cost function
Design automation
Digital systems
Hardware
Power generation economics
Prototypes
System testing
Systolic arrays
Very large scale integration
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ISBN9780818628221
0818628227
ISSN0738-100X
DOI10.1109/DAC.1992.227830

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Summary:The authors present a general methodology for extracting regularity at any level of hierarchy, and explore the problem of digital system partitioning by extraction of regularity. They consider system-level partitioning to demonstrate that regularity can lead to reduced design costs. The digital system is modeled with cyclic directed graphs. A prototype system based on these ideas has been built. Some examples are discussed.< >
ISBN:9780818628221
0818628227
ISSN:0738-100X
DOI:10.1109/DAC.1992.227830