Functional test generation for behaviorally sequential models

• Published in: Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001 pp. 403 - 410
• Main Authors: Ferrandi, F., Ferrara, G., Sciuto, D., Fin, A., Fummi, F.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 2001
• Subjects: Computer bugs; Costs; Emulation; Hardware design languages; Marine vehicles; Process design; Product development; Sequential analysis; Software testing; Standards development
• ISBN: 9780769509938; 0769509932
• ISSN: 1530-1591; 1558-1101
• DOI: 10.1109/DATE.2001.915056

Functional testing of HDL specifications is one of the most promising approaches for the verification of the functionalities of a design before synthesis. The contribution of this work is the development of a test generation algorithm targeting a new coverage metric (called bit-coverage) that provides full statement coverage, branch coverage, condition coverage and partial path coverage for behaviorally sequential models. The behavioral test sequences can be also the only way to evaluate testability of VHDL model for which a gate-level representation is not available (e.g third-party cores), since the behavioral error model is characterized also by a high correlation with the RT and gate-level stuck-at fault model. Moreover the preciseness of the proposed coverage metric makes the identified test sequences more effective in identifying design errors, than other test patterns developed by following standard coverage metrics.