A flexible processor architecture for MPEG-4 image compositing

• Published in: Proceedings of the 1998 IEEE International Conference on Acoustics, Speech and Signal Processing, ICASSP '98 (Cat. No.98CH36181) Vol. 5; pp. 3153 - 3156 vol.5
• Main Authors: Berekovic, M., Frase, R., Pirsch, P.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 1998
• Subjects: Arithmetic; Computer architecture; Data mining; Decoding; Digital signal processing; Layout; MPEG 4 Standard; Real time systems; Rendering (computer graphics); Streaming media
• ISBN: 9780780344280; 0780344286
• ISSN: 1520-6149; 2379-190X
• DOI: 10.1109/ICASSP.1998.678195

This paper proposes a new array architecture for MPEG-4 image compositing. The emerging MPEG4 standard for multimedia applications allows script-based compositing of audiovisual scenes from multiple audio and visual objects. MPEG-4 supports both, natural (video) and synthetic (3D) visual objects or a combination of both. Objects can be manipulated, e.g. positioned, rotated, warped or duplicated by user interaction. A coprocessor architecture is presented, that works in parallel to an MPEG-4 video- and audio-decoder, and performs computation and bandwidth intensive low-level tasks for image compositing. The processor consists of an SIMD array of 16 DSPs to reach the required processing power for real-time image warping, alpha-blending and 3D rendering tasks. A programmable architecture allows one to adapt the processing resources to the specific needs of different tasks and applications. The processor has an object-oriented cache architecture with 2D virtual address space (e.g. textures), that allows concurrent and conflict-free access to shared data objects for all 16 DSPs. Especially I/O intensive tasks like texture-mapping, alpha-blending, image warping, z-buffer and shading algorithms benefit from shared memory caches and the possibility to preload data before it is accessed.