Macromodels for generating signal integrity and timing management advice for package design
The electrical design of packaging for high speed digital systems requires intensive efforts on the part of signal integrity engineers. We have produced a set of tools that assist these engineers in efficiently producing PCB and MCM designs that meet timing and other electrical needs. This paper des...
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Published in | Proceedings of IEEE 43rd Electronic Components and Technology Conference (ECTC '93) pp. 523 - 529 |
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Main Authors | , , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
1993
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Subjects | |
Online Access | Get full text |
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Summary: | The electrical design of packaging for high speed digital systems requires intensive efforts on the part of signal integrity engineers. We have produced a set of tools that assist these engineers in efficiently producing PCB and MCM designs that meet timing and other electrical needs. This paper describes the most important aspect of this solution, the internal 'macromodels' that accurately capture the relationships between electrical/timing design and the package physical design (or layout).< > |
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ISBN: | 0780307941 9780780307940 |
DOI: | 10.1109/ECTC.1993.346796 |