18.2% (AM1.5) efficient GaAs solar cell on optical-grade polycrystalline Ge substrate

• Published in: Conference Record of the Twenty Fifth IEEE Photovoltaic Specialists Conference - 1996 pp. 31 - 36
• Main Authors: Venkatasubramanian, R., O'Quinn, B.C., Hills, J.S., Sharps, P.R., Timmons, M.L., Hutchby, J.A., Field, H., Ahrenkiel, R., Keyes, B.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 1996
• Subjects: Crystallization; Dark current; Doping; Gallium arsenide; Lighting; Optical devices; Optical materials; Photovoltaic cells; Temperature; Voltage
• ISBN: 0780331664; 9780780331662
• ISSN: 0160-8371
• DOI: 10.1109/PVSC.1996.563940

In this work, the authors present GaAs material and device-structure optimization studies that have led to achieve a open-circuit voltage of /spl sim/1 volt and a best solar cell efficiency of 18.2% under AM1.5G illumination, for a 4 cm/sup 2/ area GaAs cell on commercially-available, cast, optical-grade polycrystalline Ge substrate. This V/sub /spl infin// is almost 70 mV higher than on their previously-reported best GaAs cell on similar substrates. They discuss the growth of high-quality GaAs-AlGaAs layers, across the various crystalline orientations of a polycrystalline Ge substrate, important for obtaining good device performance. Optimization studies of the minority-carrier properties of GaAs layers on poly-Ge substrates have revealed that lifetime-spread across various grains can be reduced through the use of lower doping for the Al/sub 0.8/Ga/sub 0.2/As confinement layers. The cell-structure optimization procedures for improved V/sub /spl infin// and cell efficiency, include the use of thinner emitters, a spacer layer near the p/sup +/-n junction and an improved window layer. An experimental study of dark currents in these junctions, with and without the spacer, as a function of temperature (77 K to 288 K) is presented indicating that the spacer reduces the tunneling contribution to dark current.