PEAS-I: A hardware/software co-design system for ASIPs

• Published in: Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference pp. 2 - 7
• Main Authors: Alomary, A., Nakata, T., Honma, Y., Sato, J., Hikichi, N., Imai, M.
• Format: Conference Proceeding
• Language: English
• Published: IEEE Comput. Soc. Press 1993
• Subjects: Application software; Application specific processors; Assembly systems; Design optimization; Energy consumption; Hardware design languages; Linear programming; Optimizing compilers; Program processors; Software systems
• ISBN: 9780818643507; 0818643501
• DOI: 10.1109/EURDAC.1993.410608

The current implementation and experimental results of the PEAS-1 (practical environment for application specific integrated processor (ASIP) development - Version I) system are described. The PEAS-I system is a hardware/software co-design system for ASIP development. The input to the system is a set of application programs written in C language, an associated data set, and design constraints such as chip area and power consumption. The system generates an optimized CPU core design in the form of an HDL, as well as a set of application program development tools, such as a C compiler, assembler, and simulator. A novel method that formulates the design of an optimal instruction set using an integer programming approach is described. A tool that enables the designer to predict the chip area and performance of the design before the detailed design is completed is discussed. Application program development tools are generated in addition to the ASIP hardware design.< >