A video signal processor for motion-compensated field-rate upconversion in consumer television

In today's 100 Hz television sets, the display rate is doubled by displaying incoming fields twice. Moving objects are displayed at an incorrect position in the interpolated fields. In the new generation 100 Hz television sets, this artifact is solved by motion-compensated interpolation. Known...

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Bibliographic Details
Published in1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC pp. 248 - 249
Main Authors De Loore, B., Lippens, P., Eeckhout, P., Huijgen, H., Loning, A., McSweeney, B., Verstraelen, M., Pham, B., de Haan, G., Kettenis, J.
Format Conference Proceeding
LanguageEnglish
Published IEEE 1996
Subjects
Bandwidth
Circuit synthesis
Computer architecture
Interpolation
Microprocessors
Motion estimation
Noise reduction
Signal processing
Signal processing algorithms
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Summary:In today's 100 Hz television sets, the display rate is doubled by displaying incoming fields twice. Moving objects are displayed at an incorrect position in the interpolated fields. In the new generation 100 Hz television sets, this artifact is solved by motion-compensated interpolation. Known algorithms for motion estimation and compensation require a huge number of computations. A 3D-recursive block matching algorithm makes possible a one-chip solution. The presented IC is also capable of jitter-free motion portrayal of movie material (25 Hz to 60 Hz upconversion), noise reduction, and vertical zoom.
ISBN:9780780331365
0780331362
ISSN:0193-6530
2376-8606
DOI:10.1109/ISSCC.1996.488591