BIST architectures selection based on behavioral testing

BIST techniques have been widely explored to create the best performing self-testing architecture. Their success depends on the type of test pattern required by the circuit under test. The main goal of the paper is to show a methodology, based on behavioral information, to identify the best suited B...

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Bibliographic Details
Published inProceedings IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems pp. 292 - 298
Main Authors Biasoli, G., Ferrandi, F., Fin, A., Fummi, F., Sciuto, D.
Format Conference Proceeding
LanguageEnglish
Published IEEE 2000
Subjects
Automatic testing
Built-in self-test
Circuit faults
Circuit simulation
Circuit testing
Clocks
Costs
Fault detection
Performance analysis
Performance evaluation
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Summary:BIST techniques have been widely explored to create the best performing self-testing architecture. Their success depends on the type of test pattern required by the circuit under test. The main goal of the paper is to show a methodology, based on behavioral information, to identify the best suited BIST architecture for a given circuit under test. LFSR-based architectures for behavioral test sequences, providing a high stuck-at fault coverage, have been explored and evaluated.
ISBN:0769507190
9780769507194
ISSN:1550-5774
2377-7966
DOI:10.1109/DFTVS.2000.887169