Process Control in Semiconductor Manufacturing

• Published in: The Control Handbook pp. 327 - 344
• Format: Book Chapter
• Language: English
• Published: United Kingdom CRC Press 2011; Taylor & Francis Group
• Subjects: Electronics engineering; ENVIRONMENTAL ENGINEERING & TECHNOLOGY; SCIENCE: GENERAL ISSUES; MPC; Product Wafers; Registration Errors; Wafer Surface; Etch Rate; Wafer Temperature; Reticle Field; RTP; ASIC; Test Wafers; Resist Thickness; Semiconductor Manufacturing; Overlay Errors; EWMA; CMP Process; Alignment Marks; SOI; Soft Bake; Plasma Etching; Feedforward Control; Hard Bake; Infrared Heat Source; Metrology Tool; EWMA Controller; Nonlinear Model Predictive Control Scheme
• ISBN: 9781420073607; 1420073605
• DOI: 10.1201/b10382-20

Solid-state devices are manufactured on disks of semiconducting material called wafers. These devices are three-dimensional structures made up of stacked two-dimensional layers. Each layer is manufactured by one or two of the four basic unit operations: deposition, patterning, doping, and heat treatment; see Table 11.1 for examples of each operation. The purpose of deposition is to grow a thin layer of a specific material onto the wafer surface. Patterning is the process of selective removal of the top layer (or layers) of the wafer. In the doping processes the conductivity and resistivity of the wafer surface are altered by adding specific contaminants to the exposed areas of the wafer. Finally, heat treatment raises or lowers the wafer temperature to evaporate solvents or anneal the surface [1].