An MPEG-4 video LSI with an error-resilient codec core based on a fast motion estimation algorithm

An MPEG-4 video codec core based on a scene-adaptive motion estimation algorithm is integrated into 5.296/spl times/5.296 mm/sup 2/ die using 0.18 /spl mu/m quad-metal technology. The power dissipation during codec operation of the device is 131 mW for QCIF format at 15 frames/s at 13.5 MHz using a...

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Published in2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315) Vol. 1; pp. 368 - 474 vol.1
Main Authors Nakayama, H., Yoshitake, T., Komazaki, H., Watanabe, Y., Araki, H., Morioka, K., Li, J., Peilin, L., Lee, S., Kubosawa, H., Otobe, Y.
Format Conference Proceeding
LanguageEnglish
Published IEEE 2002
Subjects
Clocks
Codecs
Decoding
Encoding
Large scale integration
Motion estimation
MPEG 4 Standard
Pipelines
Power dissipation
Resilience
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Summary:An MPEG-4 video codec core based on a scene-adaptive motion estimation algorithm is integrated into 5.296/spl times/5.296 mm/sup 2/ die using 0.18 /spl mu/m quad-metal technology. The power dissipation during codec operation of the device is 131 mW for QCIF format at 15 frames/s at 13.5 MHz using a 1.5 V supply.
ISBN:9780780373358
0780373359
DOI:10.1109/ISSCC.2002.993085