A fully integrated 2×2 b/g and 1×2 a-band MIMO WLAN SoC in 45nm CMOS for multi-radio IC

• Published in: 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers pp. 328 - 329
• Main Authors: Kumar, Rakesh, Bhasin, Hemant, Agrawal, Meghna, Narayan, Subramanian, Dharwekar, Yogesh, Garg, Robin, Edayath, Vimal, Suseela, Thirunaavukkarassu, Jayaram, Vikram, Ram, Shankar, Murugan, Vidhya, Krishnaswamy, T., Kumar, Anil, Mukherjee, Subhashish, Dixit, Nagaraj, Nussbaum, Eran, Dror, Joel, Ginzburg, Nir, EvenChen, Asaf, Maruani, Asaf, Sankaran, Swaminathan, Srinivasan, Venkatesh, Rajendran, Gireesh, Rentala, Vijay, Sahu, Debapriya, Sivadas, Apu, Nandigam, Murali, Ganeshan, Saravana, Datla, Srihari, Kudari, Anand
• Format: Conference Proceeding
• Language: English; Japanese
• Published: IEEE 01.02.2013
• Subjects: MIMO; Mixers; Noise; Phase locked loops; Switches; System-on-chip; Wireless LAN
• ISBN: 9781467345156; 1467345156
• ISSN: 0193-6530; 2376-8606
• DOI: 10.1109/ISSCC.2013.6487755

A significant increase in Smartphones and tablets with embedded Wi-Fi demands a low-cost system solution. In this paper the RF core of an 802.11n 2×2 b/g band, 2×1 a-band MIMO WLAN SoC with die area of 3.83mm 2 in 45nm CMOS is described. As shown in Fig. 19.1.1 the SoC has integrated Power Amplifier (PA) for both bands and T/R switch in b/g band, eliminating the need for an expensive external Front-End Module. The LO is synthesized by a two-step DLL-PLL architecture to meet the stringent phase-noise requirements.