SCFIT: A FPGA-based fault injection technique for SEU fault model

In this paper, we have proposed a fast and easy-to-develop FPGA-based fault injection technique. This technique uses the Altera FPGAs debugging facilities in order to inject SEU fault model in both flip-flops and memory units. Since this method uses the FPGAs built-in facilities, it imposes a neglig...

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Bibliographic Details
Published in2012 Design, Automation & Test in Europe Conference & Exhibition (DATE) pp. 586 - 589
Main Authors Mohammadi, A., Ebrahimi, M., Ejlali, A., Miremadi, S. G.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.03.2012
Subjects
Circuit faults
Clocks
Debugging
Field programmable gate arrays
Probes
Radiation detectors
Registers
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Summary:In this paper, we have proposed a fast and easy-to-develop FPGA-based fault injection technique. This technique uses the Altera FPGAs debugging facilities in order to inject SEU fault model in both flip-flops and memory units. Since this method uses the FPGAs built-in facilities, it imposes a negligible performance and area overhead on the system. The experimental results on Leon2 processor shows that the proposed technique is on average four orders of magnitude faster than a simulation-based fault injection.
ISBN:1457721457
9781457721458
ISSN:1530-1591
1558-1101
DOI:10.1109/DATE.2012.6176538