A 128-channel, 9ps column-parallel two-stage TDC based on time difference amplification for time-resolved imaging

This paper proposes a 128-channel column-parallel two-stage time-to-digital converter (TDC) utilizing a time difference amplifier (TDA) and shows measurement results with a 0.35um CMOS process. The 1st stage operates as a coarse TDC, the time residue which is not converted in the 1st stage is amplif...

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Bibliographic Details
Published in2011 Proceedings of the ESSCIRC (ESSCIRC) pp. 119 - 122
Main Authors Mandai, S., Charbon, E.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.09.2011
Subjects
Arrays
CMOS integrated circuits
Delay
Imaging
Synchronization
Voltage-controlled oscillators
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Summary:This paper proposes a 128-channel column-parallel two-stage time-to-digital converter (TDC) utilizing a time difference amplifier (TDA) and shows measurement results with a 0.35um CMOS process. The 1st stage operates as a coarse TDC, the time residue which is not converted in the 1st stage is amplified by a TDA, then converted by the 2nd stage TDC. As the gain of the time difference amplifier can be adjusted from 8.6 to 21.6, the time resolution of the TDC can be tuned from 22.4ps to 8.9ps. The time resolution variation due to PVT effects is ±12% without compensation, however calibration can be used to compensate for this variation.
ISBN:9781457707032
1457707039
ISSN:1930-8833
2643-1319
DOI:10.1109/ESSCIRC.2011.6044929