Phase-tracking loop based on delta-sigma oversampling architecture
This paper presents a new oversampling architecture for implementing phase-tracking loop that is commonly utilized for position sensors such that synchro, resolver, and incremental encoder. This architecture consists of the cascade connection of three stage: coarse-quantizing and oversampling modula...
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Published in | 2006 IEEE International Symposium on Circuits and Systems (ISCAS) pp. 4 pp. - 3785 |
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Main Authors | , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
2006
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Subjects | |
Online Access | Get full text |
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Summary: | This paper presents a new oversampling architecture for implementing phase-tracking loop that is commonly utilized for position sensors such that synchro, resolver, and incremental encoder. This architecture consists of the cascade connection of three stage: coarse-quantizing and oversampling modulation, direct signal processing, and decimation filtering. It is expected that the oversampling strategy and the signal processing increase the resolution of detecting phase as well as oversampling A/D converters. This paper shows a simplest design of the signal processing circuit and some simulation results |
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ISBN: | 0780393899 9780780393899 |
ISSN: | 0271-4302 2158-1525 |
DOI: | 10.1109/ISCAS.2006.1693451 |