Temperature sensor placement including routing overhead and sampling inaccuracies
Dynamic thermal management techniques require a collection of on-chip thermal sensors that imply a significant area and power overhead. Finding the optimum number of temperature monitors and their location on the chip surface to optimize accuracy is an NP-hard problem. In this work we improve the mo...
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Published in | 2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) pp. 69 - 72 |
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Main Authors | , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
01.09.2012
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Subjects | |
Online Access | Get full text |
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Summary: | Dynamic thermal management techniques require a collection of on-chip thermal sensors that imply a significant area and power overhead. Finding the optimum number of temperature monitors and their location on the chip surface to optimize accuracy is an NP-hard problem. In this work we improve the modeling of the problem by including area, power and networking constraints along with the consideration of three inaccuracy terms: spatial errors, sampling rate errors and monitor-inherent errors. The problem is solved by the simulated annealing algorithm. We apply the algorithm to a test case employing three different types of monitors to highlight the importance of the different metrics. Finally we present a case study of the Alpha 21364 processor under two different constraint scenarios. |
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ISBN: | 9781467306850 1467306851 |
DOI: | 10.1109/SMACD.2012.6339419 |