A Wearable EEG Amplifier Using a Novel Teraohm Low-Distortion Tunable Hybrid Pseudo-Resistor

This paper presents a comparison report on various pseudoresistor topologies used in biosignal processing. Two novel hybrid pseudoresistor (PR) designs are being proposed. An ultra-low-power, low-noise chopped EEG amplifier is then implemented using a hybrid PR, and measurement results reported. The...

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Bibliographic Details
Published in2021 IEEE International Symposium on Circuits and Systems (ISCAS) pp. 1 - 5
Main Author Abbasi, Mohammad Usaid
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.05.2021
Subjects
calibration
chopper amplifier
CMOS technology
dc servo loop
EEG
electrode offset
Electroencephalography
low noise
neural recording
Noise measurement
pseudoresistor
Resistance
ripple rejection loop
Servomotors
Topology
Total harmonic distortion
ultra-low power
wearable
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Summary:This paper presents a comparison report on various pseudoresistor topologies used in biosignal processing. Two novel hybrid pseudoresistor (PR) designs are being proposed. An ultra-low-power, low-noise chopped EEG amplifier is then implemented using a hybrid PR, and measurement results reported. The EEG amplifier is designed to handle an electrode offset of value, 50mVpp while preserving the low-frequency EEG signal. A dc servo loop (DSL) is used to reject the dc offset, and the chopping ripple is reduced through a dc offset calibration loop. The amplifier is implemented in 0.18μm CMOS technology and can operate with a total current of 1.6μΑ, achieving NEF of 2.92. The amplifier achieved a PSRR and CMRR of 85dB. The current consumption of 1.6μΑ affirms suitability of this implementation for coin cell battery operated wearable EEG recording headset. The achieved input-referred noise of 0.61μν in the frequency band of 0.5-100Hz is desirable for EEG system.
ISBN:9781728192017
1728192013
ISSN:2158-1525
2158-1525
DOI:10.1109/ISCAS51556.2021.9401111