ACHS Optimizations on 3D Interconnect Arrangements

• Published in: 2022 IEEE International Symposium on Circuits and Systems (ISCAS) pp. 1201 - 1202
• Main Authors: Iparraguirre, Daniel, Delgado-Frias, Jose G.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 28.05.2022
• Subjects: Circuits and systems; Crosstalk; Integrated circuit interconnections; Interconnected systems; Nonhomogeneous media; Three-dimensional displays; Wires
• ISSN: 2158-1525
• DOI: 10.1109/ISCAS48785.2022.9937858

The Asymmetric Crosstalk Harnessed Signaling (ACHS) scheme [1]-[4] provides a significant improvement to the original Crosstalk Harnessed Signaling (CHS) technique [5]. This paper presents a study of design optimizations applied on 3D multilayer interconnect arrangements [2] [3] [6], in which alterations on the encoding matrices or the distribution of wires in the channel translate into a modification of the bit encoding regions and their associated performances. While ACHS has been presented as a vastly superior signaling option than the originally proposed CHS due to the elimination of the highly sensitive common encoding eigenmode [1], further encoding optimizations on the critical (worst performing) data bits and the strobe inside the ACHS implementation can further improve the bus performance. This work presents a full set of performance comparisons involving data and strobe bits, on a ACHS-encoded bus with channels adjacently routed in 3- and 4-layer 3D interconnect arrangements.