A Power-Efficient Current Readout Circuit with VCO-Based 2nd-Order CT \Delta\Sigma ADC for Electrochemistry Acquisition

• Published in: 2020 IEEE Asian Solid-State Circuits Conference (A-SSCC) pp. 1 - 2
• Main Authors: Lee, Hao-Yun, Huang, Peng-Wei, Ciou, Ding-Siang, Liao, Zhan-Xian, Lee, Shuenn-Yuh
• Format: Conference Proceeding
• Language: English
• Published: IEEE 09.11.2020
• Subjects: Application specific integrated circuits; Current readout circuit; Electrochemistry; electrochemistry acquisition; Generators; Noise shaping; Regulators; Solid state circuits; VCO-based continuous-time delta-sigma modulator; Voltage-controlled oscillators
• DOI: 10.1109/A-SSCC48613.2020.9336110

This paper presents an application specific integrated circuit (ASIC) for electrochemistry acquisition with a high power-efficient current readout circuit. The proposed ASIC includes a current-sensing voltage-controlled oscillator (VCO)-based continuous-time delta-sigma modulator (CTDSM), a decimation filter, an UART package generator and low-dropout regulators. The proposed VCO-based CTDSM features direct connection to the electrochemical sensor without pre-amplifier, which can directly quantize the reaction current signal to achieve a better power efficiency. Second order noise shaping is achieved by using an additional capacitor as a passive integrator and a dual-VCO structure as an integrator in phase domain. The digital circuitry mainly functions as a decimation filter and an UART package generator. The proposed ASIC implemented in TSMC 0.18\ \mu\mathrm{m} CMOS process can achieve 73 dB dynamic range (DR) and power efficiency of 0.73 while consuming only 73.9\ \mu\mathrm{W} . The total chip area is 2.25 mm 2 .