CIP metrology improving the bump yield in photo-lithography process

With the seven quality control methods under the CIP control, the entire package yield in micro-bump products is promoted from 99.31% to 99.58% during four-month record and tracking. Through these effective and analytical efforts, the rework ratio in the abnormal PR coating contribution was decrease...

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Published in2015 10th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT) pp. 386 - 389
Main Authors Mu-Chun Wang, Wei-Chun Chung, Yu Yi-Hong, Yu-Wei Wang, Chii-Wen Chen, Wen-How Lan
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.10.2015
Subjects
Assembly
Coatings
Gold
Integrated circuits
Lithography
Metrology
Monitoring
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Abstract With the seven quality control methods under the CIP control, the entire package yield in micro-bump products is promoted from 99.31% to 99.58% during four-month record and tracking. Through these effective and analytical efforts, the rework ratio in the abnormal PR coating contribution was decreased from 0.29% to 0.19%. The result for the auto misalignment was reduced from 0.23% to 0.13% as well for the repeatable defect from 0.17% to 0.1%. The whole package yield during these three issues was promoted around 0.3%.
AbstractList With the seven quality control methods under the CIP control, the entire package yield in micro-bump products is promoted from 99.31% to 99.58% during four-month record and tracking. Through these effective and analytical efforts, the rework ratio in the abnormal PR coating contribution was decreased from 0.29% to 0.19%. The result for the auto misalignment was reduced from 0.23% to 0.13% as well for the repeatable defect from 0.17% to 0.1%. The whole package yield during these three issues was promoted around 0.3%.
Author Yu Yi-Hong
Mu-Chun Wang
Wen-How Lan
Wei-Chun Chung
Chii-Wen Chen
Yu-Wei Wang
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  organization: Dept. of Electron. Eng., Minghsin Univ. of Sci. & Technol., Hsinchu, Taiwan
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  surname: Chii-Wen Chen
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  email: cwchen@must.edu.tw
  organization: Dept. of Electron. Eng., Minghsin Univ. of Sci. & Technol., Hsinchu, Taiwan
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  surname: Wen-How Lan
  fullname: Wen-How Lan
  email: whlan@nuk.edu.tw
  organization: Dept. of Electr. Eng., Nat. Univ. of Kaohsiung, Kaohsiung, Taiwan
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SubjectTerms Assembly
Coatings
Gold
Integrated circuits
Lithography
Metrology
Monitoring
Title CIP metrology improving the bump yield in photo-lithography process
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