Thyristor Gate Control implementation on FPGA for particle accelerator facilities

This paper provides the general description, design guidelines and implementation issues of a digital Thyristor Gate Control (TGC) system developed for particle accelerator facilities. The present proposal improves the TGC performance by replacing the conventional synchronization method based on a s...

Full description

Saved in:
Bibliographic Details
Published in2014 Argentine Conference on Micro-Nanoelectronics, Technology and Applications (EAMTA) pp. 48 - 53
Main Authors Orallo, C. M., Carugati, I., Funes, M., Maestri, S., Goudard, O., Wassinger, N., Benedetti, M.
Format Conference Proceeding
LanguageEnglish
Published EDIUNS 01.07.2014
Subjects
Field programmable gate arrays
Field-Programmable Gate Arrays (FPGAs)
Frequency synchronization
Grid synchronization
Phase locked loops
Synchronization
Thyristor Gate Control
Thyristors
Time-frequency analysis
Transforms
Online AccessGet full text

Cover

More Information
Summary:This paper provides the general description, design guidelines and implementation issues of a digital Thyristor Gate Control (TGC) system developed for particle accelerator facilities. The present proposal improves the TGC performance by replacing the conventional synchronization method based on a single phase zero crossing Phase Lock Loop (PLL) with a novel three-phase synchronous method known as Variable Sampling Period Filter PLL (VSPF-PLL). The proposal is implemented in a custom board and it is tested in a 6-phase power converter under a very distorted mains.
DOI:10.1109/EAMTA.2014.6906078