Variable-length gateless transistor for analog one-time-programmable memory applications

This work presents a novel embedded Analog Gateless One-Time-Programming Memory (AG-OTP), implemented by standard CMOS logic process. The NVM cell includes a gateless storage node in series with a select transistor; where the charge stored on the parasitic ONO structure. The p-channel device is prog...

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Bibliographic Details
Published in2016 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) pp. 1 - 2
Main Authors Po-Ruei Cheng, Chih-Sung Yang, Meng-Yin Hsu, Chrong Jung Lin, Ya-Chin King
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.04.2016
Subjects
CMOS integrated circuits
Current measurement
Dielectrics
Logic gates
Nonvolatile memory
Programming
Transistors
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Summary:This work presents a novel embedded Analog Gateless One-Time-Programming Memory (AG-OTP), implemented by standard CMOS logic process. The NVM cell includes a gateless storage node in series with a select transistor; where the charge stored on the parasitic ONO structure. The p-channel device is programmed by channel hot hole induced hot electron injection (CHHIHE). An angled-shaped source region allows the gateless channel to be partially turned-on and gradually increase the read current level. This unique structure enable the storage of analog data as continuous read current can be readily achieved.
DOI:10.1109/VLSI-TSA.2016.7480485