Experimental demonstration of SiC screen grid vertical JFET (SiC-SGVJFET) having a ultra-low Crss

We have implemented a novel SiC power JFET having a ultra-low feedback capacitance Crss and the voltage rating of 1200V, which is called the screen grid vertical JFET (SGVJFET). Capacitance-voltage tests have made it clear that the introduction of the screen grid drastically reduces the Crss. Impact...

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Bibliographic Details
Published in2016 28th International Symposium on Power Semiconductor Devices and ICs (ISPSD) pp. 487 - 490
Main Authors Yano, Koji, Ishikawa, Tsuyoshi, Tanaka, Yasunori, Yatsuo, Tsutomu, Yamamoto, M.
Format Conference Proceeding Journal Article
LanguageEnglish
Published IEEE 01.06.2016
Subjects
Capacitance
Electric potential
feedback capacitance
Integrated circuits
JFET
JFETs
Logic gates
on-resistance
power devices
Power semiconductor devices
Screens
Silicon carbide
Switches
Switching
Voltage
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Summary:We have implemented a novel SiC power JFET having a ultra-low feedback capacitance Crss and the voltage rating of 1200V, which is called the screen grid vertical JFET (SGVJFET). Capacitance-voltage tests have made it clear that the introduction of the screen grid drastically reduces the Crss. Impacts of the spacing between the adjacent screen grids on the static and switching characteristics have been investigated.
Bibliography:ObjectType-Article-2
SourceType-Scholarly Journals-1
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SourceType-Conference Papers & Proceedings-2
ISSN:1946-0201
DOI:10.1109/ISPSD.2016.7520884