An overview of low power technologies and the Alternative Approaches for low power IOT Architecture

In VLSI, while designing chips, circuit's power consumption has been a major concern especially when designing circuits for low power application circuits and this is the agenda for this paper. Reduction of power dissipation technology is implemented in different levels of architecture of the i...

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Bibliographic Details
Published in2024 Fourth International Conference on Advances in Electrical, Computing, Communication and Sustainable Technologies (ICAECT) pp. 1 - 6
Main Author Nagalakshmi, T. J.
Format Conference Proceeding
LanguageEnglish
Published IEEE 11.01.2024
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Summary:In VLSI, while designing chips, circuit's power consumption has been a major concern especially when designing circuits for low power application circuits and this is the agenda for this paper. Reduction of power dissipation technology is implemented in different levels of architecture of the integrated circuits. In the circuits, as the number of transistor used increases, the power dissipation increases at the same time the size of the circuit also increases. And due to increase in the power dissipation, the heat dissipation in the circuit increases. So in order to reduce heat generation, heat sink must be included in the circuit. This leads to the increase in size and weight of the circuit. To overcome this drawback, adiabatic techniques can be used. It is an emerging technology in the CMOS design. It shows the significant reduction in the power dissipation in the circuit. Especially in the design of IOT, care must be given more in the power conservation. In adiabatic technique, the current flow through the components and voltage drop across the components are reused. Because of this reuse the power consumption is reduced. In IOT the battery life is increased. This technology is verified with the conventional CMOS circuits. The experiment was done with LT spice simulation tool. From this experiment it is inferred that there is a significant reduction in power consumption in the CMOS circuit while adiabatic technology is implemented.
DOI:10.1109/ICAECT60202.2024.10468962