Design of Low Power Flash ADC using TIQ Comparator

This study presents a novel flash ADC design using TIQ Comparator. Due to the extensive use of comparators during the development of a Flash ADC, high power usage is the main problem. Therefore, by designing a comparator with lower power usage, overall power consumption is minimized. The resistive n...

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Bibliographic Details
Published in2023 International Conference on Sustainable Computing and Data Communication Systems (ICSCDS) pp. 894 - 898
Main Authors Kuppa, Sree Ananda Valli, Manikanta, S.D.N.S.S, Gubba, Sai Kumar, Kumar, Manchalla.O.V.P., Sheeba, G. Merlin
Format Conference Proceeding
LanguageEnglish
Published IEEE 23.03.2023
Subjects
Comparator
Data communication
Encoder
Flash ADC
Inverters
Logic gates
Multiplexer
Power demand
Silicon
Tanner EDA
Threshold Inverter Quantization
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Summary:This study presents a novel flash ADC design using TIQ Comparator. Due to the extensive use of comparators during the development of a Flash ADC, high power usage is the main problem. Therefore, by designing a comparator with lower power usage, overall power consumption is minimized. The resistive network and differential comparator used in standard Flash ADC can be replaced with a threshold compensated TIQ module that uses the Threshold Inverter Quantizer (TIQ) approach. According to the TIQ design, silicon area, power use, and operation speed have all been improved. Flash ADC is designed using a modified TIQ Comparator that employs power gating technique and also mux based encoder is designed based on transmission gate logic using lector approach. The design is implemented using Tanner EDA using 180nm technology.
DOI:10.1109/ICSCDS56580.2023.10105049