A 1.67Tb, 5b/Cell Flash Memory Fabricated in 192-Layer Floating Gate 3D-NAND Technology and Featuring a 23.3Gb/mm2 Bit Density

• Published in: 2023 IEEE International Solid- State Circuits Conference (ISSCC) pp. 27 - 29
• Main Authors: Khakifirooz, Ali, Anaya, Eduardo, Balasubrahrmanyam, Sriram, Bennett, Geoff, Castro, Daniel, Egler, John, Fan, Kuangchan, Ferdous, Rifat, Ganapathi, Kartik, Guzman, Omar, Ha, Chang Wan, Haque, Rezaul, Harish, Vinaya, Jalalifar, Majid, Jungroth, Owen W., Kang, Sung-Taeg, Karbasian, Golnaz, Kim, Jee-Yeon, Li, Siyue, Madraswala, Aliasgar S., Maddukuri, Srivijay, Mohammed, Amr, Mookiah, Shanmathi, Nagabhushan, Shashi, Ngo, Binh, Patel, Deep, Poosarla, Sai Kumar, Prabhu, Naveen V., Quiroga, Carlos, Rajwade, Shantanu, Rahman, Ahsanur, Shah, Jalpa, Shenoy, Rohit S., Menson, Ebenezer Tachie, Tankasala, Archana, Thirumala, Sandeep Krishna, Upadhyay, Sagar, Upadhyayula, Krishnasree, Velasco, Ashley, Vemula, Nanda Kishore Babu, Venkataramaiah, Bhaskar, Zhou, Jiantao, Pathak, Bharat M., Kalavade, Pranav
• Format: Conference Proceeding
• Language: English
• Published: IEEE 19.02.2023
• Subjects: Costs; Flash memories; Nonvolatile memory
• ISSN: 2376-8606
• DOI: 10.1109/ISSCC42615.2023.10067616

Successful deployment of multiple generations of the 4\mathsf{b}/\mathsf{cell} (QLC) floating-gate 3D-NAND technology has paved the way for the industry-wide adoption of \mathsf{QLC} [1-4] . The transition to 5b/cell (PLC) will be another steppingstone to accelerating bit density growth and expanding Flash storage to wider markets, where a lower cost at a reasonable performance is the paramount requirement.