A 22-32.7 GHz Linearized LNA in 65-nm CMOS Using Multigate Transistor Technique

This paper presents a linearized wideband LNA in 65-nm CMOS for 28-GHz 5G applications. The prototype LNA has three common-source stages coupled by transformers. The large-signal multigate transistor (MGTR) technique is used in the last stage, utilizing auxiliary transistors to suppress the third-or...

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Bibliographic Details
Published in2023 International Conference on Microwave and Millimeter Wave Technology (ICMMT) pp. 1 - 3
Main Authors He, Chenlin, You, Fei, Wang, Yi, Xiao, Zehua, Fan, Yaojia, He, Songbai
Format Conference Proceeding
LanguageEnglish
Published IEEE 14.05.2023
Subjects
5G mobile communication
CMOS technology
Power demand
Prototypes
Simulation
Transformers
Voltage
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Summary:This paper presents a linearized wideband LNA in 65-nm CMOS for 28-GHz 5G applications. The prototype LNA has three common-source stages coupled by transformers. The large-signal multigate transistor (MGTR) technique is used in the last stage, utilizing auxiliary transistors to suppress the third-order distortion with little additional power consumption. Layout simulation results shows the prototype LNA achieves -5.6 to 3.8 dBm IIP3, -16.8 to -13.9 dBm IP 1dB , 20-23 dB gain, 3.4-4.4 dB NF over 22-32.7 GHz and consumes 43.6 mW from a 1 V supply.
DOI:10.1109/ICMMT58241.2023.10276839