Illumination Optimization for the Beol Dtco with 45 Degree Local Interconnection

In previous work we have shown a few typical patterns containing 45-degree local interconnection in the BEOL layers under 7 nm logic design rules. Our simulation result has demonstrated that the 45-degree design can save mask area up to 20%. As illumination source optimization has been widely applie...

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Bibliographic Details
Published in2023 China Semiconductor Technology International Conference (CSTIC) pp. 1 - 3
Main Authors Liu, Xianhe, Han, Muzi, Li, Yanli, Wang, Qi, Wu, Qiang
Format Conference Proceeding
LanguageEnglish
Published IEEE 26.06.2023
Subjects
45-degree interconnection
Lighting
Lithography
Logic design
minimum area
Optimization
process window
Simulation
source illumination optimization
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Summary:In previous work we have shown a few typical patterns containing 45-degree local interconnection in the BEOL layers under 7 nm logic design rules. Our simulation result has demonstrated that the 45-degree design can save mask area up to 20%. As illumination source optimization has been widely applied in lithography in advanced technology nodes for improving process window, in this work, we will report a study on the subject that, with source optimization, how the SO may affect the process window in the patterns containing the 45-degree design. Some typical patterns using conventional design rules will be presented first, then the 45-degree interconnection design will be fully investigated under illumination source optimization.
DOI:10.1109/CSTIC58779.2023.10219258