A 3mW 2.7GS/s 8b Subranging ADC with Multiple-Reference-Reference-Embedded Comparators

• Published in: 2023 IEEE International Solid- State Circuits Conference (ISSCC) pp. 276 - 278
• Main Authors: Wang, Jia-Ching, Kuo, Tai-Haur
• Format: Conference Proceeding
• Language: English
• Published: IEEE 19.02.2023
• Subjects: Resistors; Wideband
• ISSN: 2376-8606
• DOI: 10.1109/ISSCC42615.2023.10067498

A subranging ADC is a good choice for wideband applications since the numerous comparators for a flash ADC can be avoided [1-5]. However, despite the reduced number of comparators that a subranging ADC requires, these comparators still consume a considerable amount of power and induce a severe kickback error as well as heavy parasitics, thus degrading the accuracy of the ADC. In addition, a power-hungry resistor ladder is also required to provide reference voltages for the comparators. Although the reference-embedded comparator (REC) can avoid the use of a resistor ladder by realizing a deliberate offset voltage as an embedded reference (ER) voltage inside a comparator [3], [5], the aforementioned problems attributed to a number of comparators still exist. Therefore, to retain an ADC with both good power efficiency and good accuracy, a multiple-reference-embedded comparator (MREC) is proposed in this work, which equips multiple ER voltages in a single comparator and thereby reduces the number of comparators by over 70%.