Behavioral Modeling of A High-Resolution Sigma-Delta ADC
A 24-bit high-resolution sigma-delta ADC system structure is present in the paper, which is designed by adopting oversampling technology and noise shaping technology and simulated in Simulink. A modulator structure with OSR = 128, 6th order, single loop, feedforward and one bit quantization are real...
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Published in | 2022 10th International Symposium on Next-Generation Electronics (ISNE) pp. 1 - 3 |
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Main Authors | , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
12.05.2023
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Subjects | |
Online Access | Get full text |
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Summary: | A 24-bit high-resolution sigma-delta ADC system structure is present in the paper, which is designed by adopting oversampling technology and noise shaping technology and simulated in Simulink. A modulator structure with OSR = 128, 6th order, single loop, feedforward and one bit quantization are realized. The modulator coefficients are obtained by Matlab. In the Simulink ideal model, the signal-to-noise ratio (SNR) can reach 148.5dB. Considering the non-ideal factors such as KT/C noise, clock jitter and operational amplifier noise, the SNR is 126dB. The 24-bit high-resolution sigma-delta ADC can satisfy a variety of industrial measurement scenarios (such as temperature measurement, pressure measurement, industrial automation monitoring, etc.) and medical applications (ECG measurement, EEG measurement, telemedicine, etc.). |
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ISSN: | 2378-8607 |
DOI: | 10.1109/ISNE56211.2023.10221631 |