A Miniature Data Acquisition System using an Indigenous Sigma-Delta ADC ASIC
This paper deals with the design and development of a Data Acquisition System (DAS) based on a multi-core sigma-delta Analog-to- Digital Converter (ADC) Application Specific Integrated Circuit (ASIC). The ASIC is indigenously designed and fabricated in Semi-Conductor Laboratory (SCL) in 180 nm CMOS...
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Published in | 2021 International Conference on Intelligent Technologies (CONIT) pp. 1 - 5 |
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Main Authors | , , , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
25.06.2021
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Subjects | |
Online Access | Get full text |
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Summary: | This paper deals with the design and development of a Data Acquisition System (DAS) based on a multi-core sigma-delta Analog-to- Digital Converter (ADC) Application Specific Integrated Circuit (ASIC). The ASIC is indigenously designed and fabricated in Semi-Conductor Laboratory (SCL) in 180 nm CMOS process and consists of 16 independent autonomous ADC cores complete with sigma-delta modulator and digital FIR filter. A 32-channel DAS is realized using the ASIC and high density Field Programmable Gate Array (FPGA) device. The system has an output serial link compatible to launch vehicle telemetry systems. The module occupies an area of 75 mm x 75 mm only and weighs only about 150 grams for the lowest per-channel footprint and weight reported. The details of the design and functional evaluation carried out on the module are explained and the key performance metrics quantified. The test results show that the design is well suited for instrumentation application in industrial and automotive systems as well as in miniaturized avionics systems for ISRO's future space missions such as Small Satellite Launch Vehicle (SSLV) and Re-usable Launch Vehicle (RLV) where it can contribute substantially to volume, weight and power reduction. |
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DOI: | 10.1109/CONIT51480.2021.9498327 |