A New Embedded Chien Search Block for Reed- Solomon (RS) Codes based on Factorization of Error Locator Polynomial

Coding corrector of errors is one of the most vital and emerged system in telecommunication field.In this paper, we propose an efficient new embedded Chien Search block for RS decoder. However, it adopts a factorization of error locator polynomial. The proposed design is developed by using hardware...

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Bibliographic Details
Published in2020 International Conference on Intelligent Systems and Computer Vision (ISCV) pp. 1 - 5
Main Authors Wahbi, Azeddine, El Idrissi, Anas El Habti, Elghayyaty, Mohamed, Hadjoudja, Abdelkader, bensassi, Bahloul, Hlou, Laamari
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.06.2020
Subjects
Bit error rate
Chien search algorithm
Decoding
Embedded Chien Search Block
Error Locator Polynomial
Hardware
Hardware Description Language VHDL
Minimization
Reed-Solomon codes
RS Codes
Simulation
Software
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Summary:Coding corrector of errors is one of the most vital and emerged system in telecommunication field.In this paper, we propose an efficient new embedded Chien Search block for RS decoder. However, it adopts a factorization of error locator polynomial. The proposed design is developed by using hardware description language (HDL), after that, simulated and verified Quartus development software.To test the performances of the new developed design, minimization rate (Number of minimized logic gates) and BER criteria were used.Simulation results show the effectiveness of the proposed design than the basic. First, because it minimizes the number of logic gates and hardware resources. Therefore, a reduction of the power consumption with a minimization's rate that can attain approximately 40 % compared to the basic algorithm. Further, because it reaches a lower bit error rate.
DOI:10.1109/ISCV49265.2020.9204314