Impact of MOL/BEOL Air-Spacer on Parasitic Capacitance and Circuit Performance at 3 nm Node

Impact of air-spacer at MOL and BEOL on circuit performance at 3nm technology node is studied. Our modeling results show that by introducing air-spacer at MOL and BEOL, parasitic capacitance can be reduced by 18% and circuit performance as simulated on a 31-stage ring oscillator can be improved by 6...

Full description

Saved in:
Bibliographic Details
Published in2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) pp. 1 - 4
Main Authors Pal, Ashish, Natarajan, Sanjay, Ayyagari, Buvna, Mittal, Sushant, Bazizi, El Mehdi, Sachid, Angada, Saremi, Mehdi, Colombeau, Benjamin, Thareja, Gaurav, Lin, Samuel, Alexander, Blessy
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.09.2019
Subjects
Air-Spacer
Atmospheric modeling
back-end-of-line
Circuit optimization
Delays
FinFET
FinFETs
Integrated circuit modeling
Inverters
middle-of-line
Parasitic capacitance
ring oscillator
Online AccessGet full text

Cover

More Information
Summary:Impact of air-spacer at MOL and BEOL on circuit performance at 3nm technology node is studied. Our modeling results show that by introducing air-spacer at MOL and BEOL, parasitic capacitance can be reduced by 18% and circuit performance as simulated on a 31-stage ring oscillator can be improved by 6%. Other advanced parasitic improvement technologies, such as Ruthenium, also show similar performance improvement. Finally, we show that best circuit performance is achieved when these 2 technologies are combined, yielding to a circuit performance boost of 16%.
ISSN:1946-1577
DOI:10.1109/SISPAD.2019.8870410