A Pixel-Parallel Array Processor without Computational Logic for Computational Image Sensors

A pixel-parallel array processor without computational logic is proposed towards compact computational image sensors. By utilizing a multiplexer-based functionality paradigm, this processor saves a considerable amount of chip resources. It was prototyped on an FPGA with typical algorithm demonstrati...

Full description

Saved in:
Bibliographic Details
Published in2021 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA) pp. 51 - 52
Main Authors Lin, Yingcheng, Li, Rui, He, Wei, Zhou, Xichuan, He, Junxian, Li, Ping, Liu, Liyuan, Wu, Nanjian, Shi, Cong
Format Conference Proceeding
LanguageEnglish
Published IEEE 24.11.2021
Subjects
Image sensors
Multiplexing
Parallel processing
pixel-parallel
processing element
Programmable logic arrays
Programming
Prototypes
SIMD
System performance
vision chip
Online AccessGet full text

Cover

More Information
Summary:A pixel-parallel array processor without computational logic is proposed towards compact computational image sensors. By utilizing a multiplexer-based functionality paradigm, this processor saves a considerable amount of chip resources. It was prototyped on an FPGA with typical algorithm demonstrations. The experimental results show that our processor consumes much less logic resources than prior works while keeping comparable processing performance.
ISBN:9781665417457
1665417455
DOI:10.1109/ICTA53157.2021.9661635