Critical path reduction for scalar programs
Scalar performance on processors with instruction level parallelism (ILP) is often limited by control and data dependences. This paper describes a family of compiler techniques, called critical path reduction (CPR) techniques, which reduce the length of critical paths through control and data depend...
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Published in | Proceedings of the 28th Annual International Symposium on Microarchitecture pp. 57 - 69 |
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Main Authors | , |
Format | Conference Proceeding Journal Article |
Language | English |
Published |
IEEE
1995
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Subjects | |
Online Access | Get full text |
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Summary: | Scalar performance on processors with instruction level parallelism (ILP) is often limited by control and data dependences. This paper describes a family of compiler techniques, called critical path reduction (CPR) techniques, which reduce the length of critical paths through control and data dependences. Control CPR reduces the number of branches on the critical path and improves the performance of branch intensive codes on processors with inadequate branch throughput or excessive branch latency. Data CPR reduces the number of arithmetic operations on the critical path. Optimization and scheduling are adapted to support CPR. |
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Bibliography: | SourceType-Scholarly Journals-2 ObjectType-Feature-2 ObjectType-Conference Paper-1 content type line 23 SourceType-Conference Papers & Proceedings-1 ObjectType-Article-3 |
ISBN: | 0818673494 9780818673498 |
ISSN: | 1072-4451 |
DOI: | 10.1109/MICRO.1995.476813 |